7.2.3                 Testing of solar arrays

7.2.3.1              General

a.              Secondary arc testing of solar arrays may be omitted for solar arrays with voltage less than or equal to 10 V.

b.              Testing of solar arrays shall demonstrate that the plasma created by a primary ESD or resulting from another triggering mechanism does not lead to a self sustained secondary arc and does not lead to the degradation of the solar array.

NOTE 1      Examples are:

•       Potential triggering mechanisms are primary ESDs, hypervelocity impacts, thruster firings and other plasma sources.

•       Possible degradation of solar arrays are contamination, loss of insulation, and cell degradation

NOTE 2      Risk assessment of by-pass diode degradation should be covered by a specific EMC immunity test to ESD effects.

c.               A first series of tests shall be performed for testing discharges on inter-connectors areas.

d.              A second series of tests shall be performed with the inter-connector covered with an insulator to observe discharges in solar cell assembly (SCA) gaps areas.

e.               The test duration shall be such as to allow at least 10 discharges in each area.

7.2.3.2              Test characteristics:

a.              Testing shall be performed on solar array coupons.

NOTE              See also 7.2.3.2h.

b.              The test shall be performed using inverted voltage gradient conditions.

NOTE              An IVG configuration can be obtained by using keV electron beams or filament vaporization or neutralized or non neutralized ion source (cf reference [39]).

c.               Any method of creating the initial conductive path to trigger a secondary arc may be used if all the available current can flow through this path.

NOTE 1      Example methods are primary discharge from electron irradiation, low energy neutral plasma or laser pulse.

NOTE 2      The reason that the trigger method is not important is that objective of the test is not to demonstrate that secondary arcs do not occur but to demonstrate that they do not cause damage.

d.              If a low energy plasma (temperature of the order of 1 eV or less) is used to initiate the ESD, the inverted voltage gradient is obtained using plasma instead of vacuum in the chamber and the tests shall be modified as follows:

1.              Modify the absolute capacitances representing the satellite capacitance and solar array capacitance in order to keep the same energy for the primary discharge, since the discharge voltage is lower.

2.              Verify that the plasma path impedance does not prevent all the available charge to be discharged.

NOTE              The duration of the primary discharge is still a research topic as it seems to be a function of the whole solar panel area. So far the longest observed duration is 100 μs for a 1 m2 solar panel.

e.               Testing shall take place under vacuum in a test chamber with the following characteristics:

1.              vacuum in the chamber: around 10-4 Pa;

2.              a power supply (solar array simulator) capable of reproducing the dynamic response of the array to transient short-circuits;

3.              high voltage cable feed-throughs (up to 5 kV) to be connected to the power supply and the coupons;

4.              non-interacting surface potential recorders 0 kV to 20 kV for x-(y) scanning (if electron beam test is used);

5.              simultaneous ESD current transient monitoring and recording;

6.              visual observation, photography, and video recording of the test sample during the test;

7.              high voltage power supplies ( around -5 kV);

8.              trigger method for generating initial conductive path e.g. keV energy electron gun (e.g. 8 keV) or ion source (at least 1011 m-2 s-1 and 1 eV).

f.                The test coupon shall be a flight-representative qualification coupon.

g.              Tests shall be performed for the most severe voltage for each gap size existing on the solar array depending on section operation modes.

h.              The features of the test coupon shall include the following:

1.              2 strings of 2 cells in series bonded head to tail as a minimum.

2.              Solar cell string-to-string connections opened up and each string rewired so that the ends of each string can be connected separately at the connector.

3.              The gap between the adjacent strings set to the minimum design gap.

4.              By-pass diodes connected, including end diode, if it exists.

i.                When blocking diodes are used, their recovery time shall be less than 100 ns.

j.                The cells need not be illuminated, but available current and capacitance shall be simulated by power sources and external capacitors CSAT and CSA representing the satellite and solar array capacitances as shown in Figure 7‑1.

NOTE              When occurring spontaneously in space, a primary discharge arises from the discharge of the various capacitances on the solar array. A typical order of magnitude of the total capacitance is 200 pF to 500 pF on a GEO spacecraft under 3 kV (around 1 µC or 1 mJ).

Figure 7‑1: Solar array test set-up

k.              Cells shall be polarized during the test when the discharge occurs.

l.                Before testing, it shall be verified that cells diodes are conductive.

NOTE              This can be done by passing a small current through the string. This current is usually taken to be about 10 mA (to avoid unrealistic heating).

m.            The capacitance of the missing cover glasses shall be included in the test.

n.              All the energy stored in the various capacitances and the power delivered by the SAS shall be available within 500 ns.

NOTE              At 104 m/s the plasma bubble reaches the opposite side of an intercell gap in less than 100 ns. A discharge (in the inverted voltage case) lasts some microseconds. The reason of the requirement is that the deadline for the establishment of the nominal current is much lower than the discharge duration, i.e. around 1 µs. The set-up presented in Figure 7‑1 allows a rise time below 1 µs because the wire length (red circuit) can be easily less than 1 m.

o.              The inductance of the test circuit shall be controlled as follows:

1.              If only a part of the nominal current is flowing through the cells:

(a)            The remaining SAS power from the current source is available during the duration of the primary discharge,

(b)           the SAS inductance, LSAS, and the wire length lead to an inductance equivalent to the string inductance.

NOTE 1      Current below the nominal current can be used to polarize the cells when in the inverted voltage gradient conditions, to avoid heating the cells or when there are no blocking diodes and to simulate the whole section.

NOTE 2      , where τ is the discharge duration, L the wire length and R the arc resistivity. If we choose 1 W for R to include all the potential cases, we obtain τ = L. For a length of two metres, it takes 2 µs to obtain the nominal current. As it is in practice very difficult to reduce the length between samples in the vacuum chamber and the external power source, twisted power wires or coaxial cables can be used to reduce the inductance. This allows a longer distance between power supply and the solar array sample.       
Typical values of inductance are given in Table 7‑2.

2.              If the nominal string current is already flowing through the diodes cells, LSAS and the wire length need not be specified.